What Is A Memory Management Unit?
The memory management unit (MMU) is a hardware component that is part of the CPU.
The task of the MMU is to abstract the physical memory addresses to one or more virtual address spaces.
When the MMU is enabled, the CPU accesses memory via virtual addresses which will be translated by the MMU to physical addresses before sending them on the memory bus.
Every CPU core has its own MMU.
Why Memory Abstraction?
Memory abstraction has three big advantages:
In a multi-tasking environment, an OS can assign a dedicated virtual address space to every process.
1.) As a result, a process cannot access any physical memory which belongs to another process.
→ Memory protection
2.) A linear address range for each process makes a dynamical allocation of memory during run-time much easier and less time- consuming.
→ Dynamical memory allocation
3.) The OS can extend the physical memory by swapping currently unused memory to a mass storage (hard disk, for example).
→ Page swapping
The mapping of virtual addresses to physical addresses is done in blocks of 4 … 64 kB (CPU-specific). These blocks are called pages.
The mapping between virtual addresses and physical addresses is stored by the OS in dedicated data structures which are called page tables.
If the CPU needs a translation from a virtual address to a physical address, the MMU searches in the page tables for the corresponding entry. This procedure is called table walk.
How To Distinguish Between Different Logical Addresses?
The example on the above shows how an MMU translates the virtual address space of two processes via page tables to the physical memory.
Every process has its own Task Page Table.
Page tables are built in a tree-like structure of sub-tables to store logical-to-physical translations. This is an efficient way to keep them as small as possible in memory.
The branches in the tree are called page directories. Entries in the page directories point to the next deeper level of the tree.
The last level, the leaves, are the tables holding the final physical address translation.
The indices selecting the table entry for each level are calculated from bit slices of the logical input address which is to be translated.
Translation Lookaside Buffer
Doing a table walk is time-consuming and decreases the performance of the CPU.
Therefore MMUs are equipped with a cache which is called Translation Lookaside Buffer (TLB).
The MMU is caching the latest found mappings in the TLB to reduce the number of table walks.
Why Is An Internal Address Translation Needed?
In a multi-process environment, each process has its own page table. As the CPU’s MMU is configured for the page table of the running process, translations for inactive processes are not known.
Memory Management In Virtualized Systems
In virtualized systems, multiple guest OSes are running in virtual machines under the control of a hypervisor.
Due to the fact that multiple guest OSes are sharing one physical memory,a second stage of memory abstraction is introduced in hardware-assisted virtualized systems.